Often it is desirable to use a computer system to execute software written for a different type of computer system. For example, the owner of a new computer system may desire to execute legacy software written for their older, obsolete computer system. Often this software, which may include both application and operating system software, is in the form of compiled binary code. This code, referred to as foreign binary code, must be translated so that it will correctly execute notwithstanding the architectural differences between the new computer, referred to as the host computer system, and the obsolete computer system, referred to as the foreign computer system.
There are two well-known processes for enabling the execution of legacy software on the host system: porting and binary translation. Software porting requires access to legacy source code. This legacy source code is compiled into host code that will correctly execute on the host computer system. While it is possible to port software, it is a difficult task that requires a complete understanding of both the legacy architecture and the new host architecture. Further, there are times where the source code, the human readable version of the legacy software, is not available. Without source code, it is nearly impossible to accurately port legacy software to a new host architecture.
Binary translation, on the other hand, does not require access to legacy source code. Instead, foreign binary code is translated into code that executes on the host computer system. During the translation process, each instruction of foreign code is translated to a corresponding instruction (or sequence of instructions) that when executed by the host computer achieves the same result as if the foreign code were executed by the foreign computer system. This translated code is referred to herein as binary translated code. Various binary translation techniques are known in the art.
To improve performance and efficiency of the binary translated code, the concept of a virtual processor is also known. Virtual processors, such as the E2K designed by Elbrus International and the Crusoe designed by Transmeta Corp., are based on a flexible architecture that incorporates both hardware and software layers to achieve certain functions provided by the foreign computer system. With virtual processors, the architecture upon which the host computer system is based is completely hidden from the user. However, notwithstanding the advantages provided by virtual processors, improvements are necessary to minimize delays or other artifacts that may arise from the translation process and execution of binary translated code.
One significant problem in achieving effective binary translation arises each time the host computer accesses memory. For example, when the foreign memory structure uses page tables to correlate a logical address to a physical memory location, significant time is required to traverse the foreign page tables and determine the correct physical memory location for each memory access. Further complicating the process of accessing memory arises because many computer systems utilize virtual memory to maximize perceived memory while minimizing the actual amount of expensive random access memory. In such systems, page tables are used to translate a logical address to a physical address. When only one page table is supported, only one corresponding virtual memory can be described and supported. However, when the legacy operating system emulates multiple page tables, the operating system must be able to switch a requested page table on demand. This switching process adds inherent delay because the switching is typically accomplished by reloading a set of registers that points to the image of the page table stored in memory. When executing foreign code on the host processor, the binary translation process detects the existence of emulated page tables. However, what is needed is a method to improve execution whenever operation switches from one emulated page table to another.
The present invention relates to a microprocessor based computer system (or xe2x80x9cplatformxe2x80x9d) that is adapted to efficiently execute binary translated code. In accordance with the present invention, foreign code is translated and executed by a host processor. If the foreign computer system supports multiple page tables, the binary translation process detects a switch from one page table to another. Advantageously, the host computer system isolates each virtual memory configuration described by the page table into separate processes in virtual memory space. When execution switches from one page table to another, there is no need for registers to be purged and updated with new data.
In one preferred embodiment, the host computer system maintains foreign code and data in a foreign virtual space. Host code and translation processes are maintained in a separate host virtual space. Virtual spaces are linear logical memory spaces used by the host processor to access data and instructions (computer code). A memory management unit (MMU) maps the virtual spaces to physical memory in hardware to eliminate time consuming virtual to physical address translation when executing binary compiled host code. When the computer system detects a request to switch to a different foreign virtual space it is interpreted as a switch to new virtual machine. When a switch occurs, there is no need to reconfigure memory contents or registers as execution merely switches to a new virtual space.
Other features and advantages of the invention will be apparent in view of the following detailed description and appended drawings.